typo fix
[rpi-open-firmware.git] / arm_chainloader / drivers / sdhost_impl.cc
1 /*=============================================================================
2 Copyright (C) 2016 Kristina Brooks
3 All rights reserved.
4
5 This program is free software; you can redistribute it and/or
6 modify it under the terms of the GNU General Public License
7 as published by the Free Software Foundation; either version 2
8 of the License, or (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 FILE DESCRIPTION
16 SDHOST driver. This used to be known as ALTMMC.
17
18 =============================================================================*/
19
20 #include <chainloader.h>
21 #include <hardware.h>
22
23 #include "sd_proto.hpp"
24 #include "block_device.hpp"
25
26 #define SDEDM_WRITE_THRESHOLD_SHIFT 9
27 #define SDEDM_READ_THRESHOLD_SHIFT 14
28 #define SDEDM_THRESHOLD_MASK 0x1f
29
30 #define SAFE_READ_THRESHOLD 4
31 #define SAFE_WRITE_THRESHOLD 4
32
33 #define VOLTAGE_SUPPLY_RANGE 0x100
34 #define CHECK_PATTERN 0x55
35
36 #define SDHSTS_BUSY_IRPT 0x400
37 #define SDHSTS_BLOCK_IRPT 0x200
38 #define SDHSTS_SDIO_IRPT 0x100
39 #define SDHSTS_REW_TIME_OUT 0x80
40 #define SDHSTS_CMD_TIME_OUT 0x40
41 #define SDHSTS_CRC16_ERROR 0x20
42 #define SDHSTS_CRC7_ERROR 0x10
43 #define SDHSTS_FIFO_ERROR 0x08
44
45 #define SDEDM_FSM_MASK 0xf
46 #define SDEDM_FSM_IDENTMODE 0x0
47 #define SDEDM_FSM_DATAMODE 0x1
48 #define SDEDM_FSM_READDATA 0x2
49 #define SDEDM_FSM_WRITEDATA 0x3
50 #define SDEDM_FSM_READWAIT 0x4
51 #define SDEDM_FSM_READCRC 0x5
52 #define SDEDM_FSM_WRITECRC 0x6
53 #define SDEDM_FSM_WRITEWAIT1 0x7
54 #define SDEDM_FSM_POWERDOWN 0x8
55 #define SDEDM_FSM_POWERUP 0x9
56 #define SDEDM_FSM_WRITESTART1 0xa
57 #define SDEDM_FSM_WRITESTART2 0xb
58 #define SDEDM_FSM_GENPULSES 0xc
59 #define SDEDM_FSM_WRITEWAIT2 0xd
60 #define SDEDM_FSM_STARTPOWDOWN 0xf
61
62 #define SDHSTS_TRANSFER_ERROR_MASK (SDHSTS_CRC7_ERROR|SDHSTS_CRC16_ERROR|SDHSTS_REW_TIME_OUT|SDHSTS_FIFO_ERROR)
63 #define SDHSTS_ERROR_MASK (SDHSTS_CMD_TIME_OUT|SDHSTS_TRANSFER_ERROR_MASK)
64
65 #define logf(fmt, ...) printf("[EMMC:%s]: " fmt, __FUNCTION__, ##__VA_ARGS__);
66
67 struct SdhostImpl : BlockDevice {
68 bool is_sdhc;
69 bool is_high_capacity;
70 bool card_ready;
71
72 uint32_t ocr;
73 uint32_t rca;
74
75 uint32_t cid[4];
76 uint32_t csd[4];
77
78 uint32_t capacity_bytes;
79
80 uint32_t r[4];
81
82 uint32_t current_cmd;
83
84 void set_power(bool on) {
85 SH_VDD = on ? SH_VDD_POWER_ON_SET : 0x0;
86 }
87
88 bool wait(uint32_t timeout = 100000) {
89 uint32_t t = timeout;
90
91 while(SH_CMD & SH_CMD_NEW_FLAG_SET) {
92 if (t == 0) {
93 logf("timed out after %dus!\n", timeout)
94 return false;
95 }
96 t--;
97 udelay(10);
98 }
99
100 return true;
101 }
102
103 bool send_raw(uint32_t command, uint32_t arg = 0) {
104 uint32_t sts;
105
106 wait();
107
108 sts = SH_HSTS;
109 if (sts & SDHSTS_ERROR_MASK)
110 SH_HSTS = sts;
111
112 current_cmd = command & SH_CMD_COMMAND_SET;
113
114 SH_ARG = arg;
115 SH_CMD = command | SH_CMD_NEW_FLAG_SET;
116
117 mfence();
118
119 return true;
120 }
121
122 bool send(uint32_t command, uint32_t arg = 0) {
123 return send_raw(command & SH_CMD_COMMAND_SET, arg);
124 }
125
126 bool send_136_resp(uint32_t command, uint32_t arg = 0) {
127 return send_raw((command & SH_CMD_COMMAND_SET) | SH_CMD_LONG_RESPONSE_SET, arg);
128 }
129
130 bool send_no_resp(uint32_t command, uint32_t arg = 0) {
131 return send_raw((command & SH_CMD_COMMAND_SET) | SH_CMD_NO_RESPONSE_SET, arg);
132 }
133
134 void configure_pinmux() {
135 GP_FSEL4 = 0x24000000;
136 GP_FSEL5 = 0x924;
137 GP_PUD = 2;
138
139 logf("GPIOs set!\n");
140
141 mfence();
142 }
143
144 void reset() {
145 logf("resetting controller ...\n");
146 set_power(false);
147
148 SH_CMD = 0;
149 SH_ARG = 0;
150 SH_TOUT = 0xF00000;
151 SH_CDIV = 0;
152 SH_HSTS = 0x7f8;
153 SH_HCFG = 0;
154 SH_HBCT = 0;
155 SH_HBLC = 0;
156
157 uint32_t temp = SH_EDM;
158
159 temp &= ~((SDEDM_THRESHOLD_MASK<<SDEDM_READ_THRESHOLD_SHIFT) |
160 (SDEDM_THRESHOLD_MASK<<SDEDM_WRITE_THRESHOLD_SHIFT));
161 temp |= (SAFE_READ_THRESHOLD << SDEDM_READ_THRESHOLD_SHIFT) |
162 (SAFE_WRITE_THRESHOLD << SDEDM_WRITE_THRESHOLD_SHIFT);
163
164 SH_EDM = temp;
165 udelay(300);
166
167 set_power(true);
168
169 udelay(300);
170 mfence();
171 }
172
173 inline void get_response() {
174 r[0] = SH_RSP0;
175 r[1] = SH_RSP1;
176 r[2] = SH_RSP2;
177 r[3] = SH_RSP3;
178 }
179
180 bool wait_and_get_response() {
181 if (!wait())
182 return false;
183
184 get_response();
185
186 //printf("Cmd: 0x%x Resp: %08x %08x %08x %08x\n", current_cmd, r[0], r[1], r[2], r[3]);
187
188 if (SH_CMD & SH_CMD_FAIL_FLAG_SET) {
189 if (SH_HSTS & SDHSTS_ERROR_MASK) {
190 logf("ERROR: sdhost status: 0x%x\n", SH_HSTS);
191 return false;
192 }
193 logf("ERROR: unknown error, SH_CMD=0x%x\n", SH_CMD);
194 return false;
195 }
196
197
198 return true;
199 }
200
201 bool query_voltage_and_type() {
202 uint32_t t;
203
204 /* identify */
205 send(SD_SEND_IF_COND, 0x1AA);
206 wait_and_get_response();
207
208 /* set voltage */
209 t = MMC_OCR_3_3V_3_4V;
210 if (r[0] == 0x1AA) {
211 t |= MMC_OCR_HCS;
212 is_sdhc = true;
213 }
214
215 /* query voltage and type */
216 for (;;) {
217 send(MMC_APP_CMD); /* 55 */
218 send_no_resp(SD_APP_OP_COND, t);
219
220 if (!wait_and_get_response())
221 return false;
222
223 if (r[0] & MMC_OCR_MEM_READY)
224 break;
225
226 logf("waiting for SD (0x%x) ...\n", r[0]);
227 udelay(100);
228 }
229
230 logf("SD card has arrived!\n", r);
231
232 is_high_capacity = (r[0] & MMC_OCR_HCS) == MMC_OCR_HCS;
233
234 if (is_high_capacity)
235 logf("This is an SDHC card!\n");
236
237 return true;
238
239 }
240
241 inline void copy_136_to(uint32_t* dest) {
242 dest[0] = r[0];
243 dest[1] = r[1];
244 dest[2] = r[2];
245 dest[3] = r[3];
246 }
247
248 bool identify_card() {
249 logf("identifying card ...\n");
250
251 send_136_resp(MMC_ALL_SEND_CID);
252 if (!wait_and_get_response())
253 return false;
254
255 /* for SD this gets RCA */
256 send(MMC_SET_RELATIVE_ADDR);
257 if (!wait_and_get_response())
258 return false;
259 rca = SD_R6_RCA(r);
260
261 logf("RCA = 0x%x\n", rca);
262
263 send_136_resp(MMC_SEND_CID, MMC_ARG_RCA(rca));
264 if (!wait_and_get_response())
265 return false;
266
267 copy_136_to(cid);
268
269 /* get card specific data */
270 send_136_resp(MMC_SEND_CSD, MMC_ARG_RCA(rca));
271 if (!wait_and_get_response())
272 return false;
273
274 copy_136_to(csd);
275
276 return true;
277 }
278
279 //#define DUMP_READ
280
281 bool wait_for_fifo_data(uint32_t timeout = 100000) {
282 uint32_t t = timeout;
283
284 while ((SH_HSTS & SH_HSTS_DATA_FLAG_SET) == 0) {
285 if (t == 0) {
286 putchar('\n');
287 logf("ERROR: no FIFO data, timed out after %dus!\n", timeout)
288 return false;
289 }
290 t--;
291 udelay(10);
292 }
293
294 return true;
295 }
296
297 void drain_fifo() {
298 /* fuck me with a rake ... gently */
299
300 wait();
301
302 while (SH_HSTS & SH_HSTS_DATA_FLAG_SET) {
303 SH_DATA;
304 mfence();
305 }
306 }
307
308 virtual bool read_block(uint32_t sector, uint32_t* buf) override {
309 if (!card_ready)
310 panic("card not ready");
311
312 if (!is_high_capacity)
313 sector <<= 9;
314
315 /* drain junk from FIFO */
316 drain_fifo();
317
318 /* enter READ mode */
319 send_raw(MMC_READ_BLOCK_MULTIPLE | SH_CMD_READ_CMD_SET, sector);
320
321 int i;
322 uint32_t hsts_err = 0;
323
324 #ifdef DUMP_READ
325 if (buf)
326 logf("Reading %d bytes from sector %d using FIFO ...\n", block_size, sector);
327 #endif
328
329 #ifdef DUMP_READ
330 if (buf)
331 printf("----------------------------------------------------\n");
332 #endif
333
334 /* drain useful data from FIFO */
335 for (i = 0; i < 128; i++) {
336 /* wait for FIFO */
337 if (!wait_for_fifo_data()) {
338 break;
339 }
340
341 uint32_t hsts_err = SH_HSTS & SDHSTS_ERROR_MASK;
342 if (hsts_err) {
343 logf("ERROR: transfer error on FIFO word %d: 0x%x\n", i, SH_HSTS);
344 break;
345 }
346
347
348 volatile uint32_t data = SH_DATA;
349
350 #ifdef DUMP_READ
351 printf("%08x ", data);
352 #endif
353 if (buf)
354 *(buf++) = data;
355 }
356
357 send_raw(MMC_STOP_TRANSMISSION | SH_CMD_BUSY_CMD_SET);
358
359 #ifdef DUMP_READ
360 if (buf)
361 printf("\n----------------------------------------------------\n");
362 #endif
363
364 if (hsts_err) {
365 logf("ERROR: Transfer error, status: 0x%x\n", SH_HSTS);
366 return false;
367 }
368
369 #ifdef DUMP_READ
370 if (buf)
371 logf("Completed read for %d\n", sector);
372 #endif
373 return true;
374 }
375
376
377
378 bool select_card() {
379 send(MMC_SELECT_CARD, MMC_ARG_RCA(rca));
380
381 if (!wait())
382 return false;
383
384 return true;
385 }
386
387 bool init_card() {
388 char pnm[8];
389 uint32_t block_length;
390
391 send_no_resp(MMC_GO_IDLE_STATE);
392
393 if (!query_voltage_and_type()) {
394 logf("ERROR: Failed to query card voltage!\n");
395 return false;
396 }
397
398 if (!identify_card()) {
399 logf("ERROR: Failed to identify card!\n");
400 return false;
401 }
402
403 SD_CID_PNM_CPY(cid, pnm);
404
405 logf("Detected SD card:\n");
406 printf(" Product : %s\n", &pnm);
407
408 if (SD_CSD_CSDVER(csd) == SD_CSD_CSDVER_2_0) {
409 printf(" CSD : Ver 2.0\n");
410 printf(" Capacity: %d\n", SD_CSD_V2_CAPACITY(csd));
411 printf(" Size : %d\n", SD_CSD_V2_C_SIZE(csd));
412
413 block_length = 1 << SD_CSD_V2_BL_LEN;
414
415 /* work out the capacity of the card in bytes */
416 capacity_bytes = (SD_CSD_V2_CAPACITY(csd) * block_length);
417 }
418 else if (SD_CSD_CSDVER(csd) == SD_CSD_CSDVER_1_0) {
419 printf(" CSD : Ver 1.0\n");
420 printf(" Capacity: %d\n", SD_CSD_CAPACITY(csd));
421 printf(" Size : %d\n", SD_CSD_C_SIZE(csd));
422
423 block_length = 1 << SD_CSD_READ_BL_LEN(csd);
424
425 /* work out the capacity of the card in bytes */
426 capacity_bytes = (SD_CSD_CAPACITY(csd) * block_length);
427 }
428 else {
429 printf("ERROR: Unknown CSD version 0x%x!\n", SD_CSD_CSDVER(csd));
430 return false;
431 }
432
433 printf(" BlockLen: 0x%x\n", block_length);
434
435 if (!select_card()) {
436 logf("ERROR: Failed to select card!\n");
437 return false;
438 }
439
440 if (SD_CSD_CSDVER(csd) == SD_CSD_CSDVER_1_0) {
441 /*
442 * only needed for 1.0 ones, the 2.0 ones have this
443 * fixed at 512.
444 */
445 logf("Setting block length to 512 ...\n");
446 send(MMC_SET_BLOCKLEN, 512);
447 if (!wait()) {
448 logf("ERROR: Failed to set block length!\n");
449 return false;
450 }
451 }
452
453 block_size = 512;
454
455 logf("Card initialization complete: %s %dMB SD%s Card\n", &pnm, capacity_bytes >> 20, is_high_capacity ? "HC" : "");
456
457 return true;
458 }
459
460 void restart_controller() {
461 is_sdhc = false;
462
463 logf("hcfg 0x%X, cdiv 0x%X, edm 0x%X, hsts 0x%X\n",
464 SH_HCFG,
465 SH_CDIV,
466 SH_EDM,
467 SH_HSTS);
468
469 logf("Restarting the eMMC controller ...\n");
470
471 configure_pinmux();
472 reset();
473
474 SH_HCFG &= ~SH_HCFG_WIDE_EXT_BUS_SET;
475 SH_HCFG = SH_HCFG_SLOW_CARD_SET | SH_HCFG_WIDE_INT_BUS_SET;
476 SH_CDIV = 0x148;
477
478 udelay(300);
479 mfence();
480
481 if (init_card()) {
482 card_ready = true;
483
484 /*
485 * looks like a silicon bug to me or a quirk of csd2, who knows
486 */
487 for (int i = 0; i < 3; i++) {
488 if (!read_block(0, nullptr)) {
489 panic("fifo flush cycle %d failed", i);
490 }
491 }
492 }
493 else {
494 panic("failed to reinitialize the eMMC controller");
495 }
496 }
497
498 virtual void stop() override {
499 logf("stopping sdhost controller driver ...\n");
500
501 SH_CMD = 0;
502 SH_ARG = 0;
503 SH_TOUT = 0xA00000;
504 SH_CDIV = 0x1FB;
505
506 logf("powering down controller ...\n");
507 SH_VDD = 0;
508 SH_HCFG = 0;
509 SH_HBCT = 0x400;
510 SH_HBLC = 0;
511 SH_HSTS = 0x7F8;
512
513 logf("controller down!\n");
514 }
515
516 SdhostImpl() {
517 restart_controller();
518 logf("eMMC driver sucessfully started!\n");
519 }
520 };
521
522 SdhostImpl STATIC_DRIVER g_SDHostDriver {};
523
524 BlockDevice* get_sdhost_device() {
525 return &g_SDHostDriver;
526 }
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