unified VC4 and ARM runtime code (including C++ runtime), updated some minor bits
[rpi-open-firmware.git] / arm_chainloader / start.s
1 /*=============================================================================
2 Copyright (C) 2016-2017 Authors of rpi-open-firmware
3 All rights reserved.
4
5 This program is free software; you can redistribute it and/or
6 modify it under the terms of the GNU General Public License
7 as published by the Free Software Foundation; either version 2
8 of the License, or (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 FILE DESCRIPTION
16 ARM entry point.
17
18 This is where all cores start. For RPi1, only one core starts so we can jump
19 straight to the main bootloader. For later models, the first core jumps to the
20 bootloader. The other cores wait until SMP is enabled by the kernel later in
21 the boot process.
22
23 =============================================================================*/
24
25 #include "memory_map.h"
26
27 .text
28 .globl _start
29 _start:
30 /* vectors */
31 b L_all_cores_start
32 nop
33 nop
34 nop
35 nop
36 nop
37 nop
38 nop
39
40 L_all_cores_start:
41 /* check CPU id */
42 mrc p15, 0, r0, c0, c0, 5 @ read MPIDR
43 and r3, r0, #0xc0000000 @ multiprocessing extensions and
44 teq r3, #0x80000000 @ not part of a uniprocessor system?
45 bne L_core0 @ no, assume UP
46 ands r0, r0, #0x03 @ CPU 0?
47 bne L_deadloop @ if not, spin.
48
49 L_core0:
50 mov sp, #(MEM_STACK_END)
51
52 /* we are loaded in secure supervisor mode -- drop permissions */
53 mrc p15, 0, r0, c1, c1, 0
54 orr r0, r0, #1
55 mcr p15, 0, r0, c1, c1, 0
56
57 b main
58
59 L_deadloop:
60 b L_deadloop
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