643a59aff9443eb8fd320ce6514220f132a65719
[rpi-open-firmware.git] / bcm2708_chip / cpi.h
1 // This file was generated by the create_regs script
2 #define CPI_BASE 0x7e800000
3 #define CPI_APB_ID 0x20637069
4 #define CPI_CPIS HW_REGISTER_RW( 0x7e800000 )
5 #define CPI_CPIS_MASK 0xc0000007
6 #define CPI_CPIS_WIDTH 32
7 #define CPI_CPIS__MSB 31
8 #define CPI_CPIS__LSB 0
9 #define CPI_CPIR HW_REGISTER_RW( 0x7e800004 )
10 #define CPI_CPIR_MASK 0xffffffff
11 #define CPI_CPIR_WIDTH 32
12 #define CPI_CPIR__MSB 31
13 #define CPI_CPIR__LSB 0
14 #define CPI_CPIF HW_REGISTER_RW( 0x7e800008 )
15 #define CPI_CPIF_MASK 0xffffffff
16 #define CPI_CPIF_WIDTH 32
17 #define CPI_CPIF__MSB 31
18 #define CPI_CPIF__LSB 0
19 #define CPI_CPIW HW_REGISTER_RW( 0x7e80000c )
20 #define CPI_CPIW_MASK 0xffffffff
21 #define CPI_CPIW_WIDTH 32
22 #define CPI_CPIW__MSB 31
23 #define CPI_CPIW__LSB 0
24 #define CPI_CPIWVC HW_REGISTER_RW( 0x7e800010 )
25 #define CPI_CPIWVC_MASK 0xffffffff
26 #define CPI_CPIWVC_WIDTH 32
27 #define CPI_CPIWVC__MSB 31
28 #define CPI_CPIWVC__LSB 0
29 #define CPI_CPIWVS HW_REGISTER_RW( 0x7e800014 )
30 #define CPI_CPIWVS_MASK 0xffffffff
31 #define CPI_CPIWVS_WIDTH 32
32 #define CPI_CPIWVS__MSB 31
33 #define CPI_CPIWVS__LSB 0
34 #define CPI_CPIWHC HW_REGISTER_RW( 0x7e800018 )
35 #define CPI_CPIWHC_MASK 0xffffffff
36 #define CPI_CPIWHC_WIDTH 32
37 #define CPI_CPIWHC__MSB 31
38 #define CPI_CPIWHC__LSB 0
39 #define CPI_CPIWHS HW_REGISTER_RW( 0x7e80001c )
40 #define CPI_CPIWHS_MASK 0xffffffff
41 #define CPI_CPIWHS_WIDTH 32
42 #define CPI_CPIWHS__MSB 31
43 #define CPI_CPIWHS__LSB 0
44 #define CPI_CPIB HW_REGISTER_RW( 0x7e800020 )
45 #define CPI_CPIB_MASK 0xffffffff
46 #define CPI_CPIB_WIDTH 32
47 #define CPI_CPIB__MSB 31
48 #define CPI_CPIB__LSB 0
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