Working SDHOST/FatFS, boot partition mounts, some other minor fixes too.
[rpi-open-firmware.git] / bcm2708_chip / cryptohw.h
1 /*=============================================================================
2 Copyright (c) 2007 Broadcom Europe Limited. All rights reserved.
3
4 Project : BCM2707
5 Module : CRYPTO wrapper hardware header
6 File : $RCSfile: cryptohw.h,v $
7 Revision : $Revision: 1.2 $
8
9 FILE DESCRIPTION
10 Definition of bits within CRYPTO hardware registers.
11 =============================================================================*/
12
13 #ifndef CRYPTOHW_H
14 #define CRYPTOHW_H
15
16 #define CRYPTO_READFIELD(_w,_f) (((unsigned long)(_w) / _f) & (_f##_MASK))
17
18 enum
19 {
20 // BCM2707 has no crypto hardware but supports RNG interrupt
21 // CRYPTO_ISR_RNG_INT = (1 << 2),
22 CRYPTO_ISR_PKA_INT = (1 << 1),
23 CRYPTO_ISR_SPU_INT = (1 << 0),
24
25 // CRYPTO_IMR_RNG_INT_EN = (1 << 2),
26 CRYPTO_IMR_PKA_INT_EN = (1 << 1),
27 CRYPTO_IMR_SPU_INT_EN = (1 << 0),
28
29 CRYPTO_CLK_CFG_PKA_CLK = (1 << 8),
30 CRYPTO_CLK_CFG_PKA_CLK_MASK = 3,
31 CRYPTO_CLK_CFG_PKA_CLK_FULL = 0,
32 CRYPTO_CLK_CFG_PKA_CLK_HALF = 1,
33 CRYPTO_CLK_CFG_PKA_CLK_THIRD = 2,
34 CRYPTO_CLK_CFG_PKA_CLK_DISABLED = 3,
35
36 CRYPTO_CLK_CFG_SPU_CLK = (1 << 4),
37 CRYPTO_CLK_CFG_SPU_CLK_MASK = 3,
38 CRYPTO_CLK_CFG_SPU_CLK_FULL = 0,
39 CRYPTO_CLK_CFG_SPU_CLK_HALF = 1,
40 CRYPTO_CLK_CFG_SPU_CLK_THIRD = 2,
41 CRYPTO_CLK_CFG_SPU_CLK_DISABLED = 3,
42
43 CRYPTO_CLK_CFG_OTP_CLKDIV = (1 << 0),
44 CRYPTO_CLK_CFG_OTP_CLKDIV_MASK = 0xf,
45
46 CRYPTO_CLK_CFG_OTP_CLKDIV_2 = 0x0,
47 CRYPTO_CLK_CFG_OTP_CLKDIV_4 = 0x1,
48 CRYPTO_CLK_CFG_OTP_CLKDIV_6 = 0x2,
49 CRYPTO_CLK_CFG_OTP_CLKDIV_8 = 0x3,
50 CRYPTO_CLK_CFG_OTP_CLKDIV_10 = 0x4,
51 CRYPTO_CLK_CFG_OTP_CLKDIV_12 = 0x5,
52 CRYPTO_CLK_CFG_OTP_CLKDIV_14 = 0x6,
53 CRYPTO_CLK_CFG_OTP_CLKDIV_16 = 0x7,
54 CRYPTO_CLK_CFG_OTP_CLKDIV_18 = 0x8,
55 CRYPTO_CLK_CFG_OTP_CLKDIV_20 = 0x9,
56 CRYPTO_CLK_CFG_OTP_CLKDIV_22 = 0xa,
57 CRYPTO_CLK_CFG_OTP_CLKDIV_24 = 0xb,
58 CRYPTO_CLK_CFG_OTP_CLKDIV_26 = 0xc,
59 CRYPTO_CLK_CFG_OTP_CLKDIV_28 = 0xd,
60 CRYPTO_CLK_CFG_OTP_CLKDIV_30 = 0xe,
61 CRYPTO_CLK_CFG_OTP_CLKDIV_32 = 0xf,
62
63 CRYPTO_SIMCTRL_DEBUG = (1 << 0),
64 CRYPTO_SIMCTRL_SECURE = (1 << 1)
65 };
66
67 #endif
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