add preliminary clock code that's expected to be set up by fw, gut old arm loader...
[rpi-open-firmware.git] / drivers / BCM2708ClockDomains.cc
1 /*
2 * VideoCore4_Drivers
3 * Copyright (c) 2017 Kristina Brooks
4 *
5 * PLL VCOs and their channels.
6 */
7
8 #include <drivers/BCM2708ClockDomains.hpp>
9
10 /*
11 PLL/Channel tree:
12 |-XOSC
13 |-PLLA
14 |-CORE
15 |-PER
16 |-CCP2
17 |-DSI0
18 |-PLLB
19 |-ARM
20 |-ARM Clock (CM_ARM*)
21 |-SP0 (???)
22 |-SP1 (???)
23 |-SP2 (???)
24 |-PLLC
25 |-CORE0
26 |-CORE1
27 |-PER
28 |-CORE2 (???)
29 |-PLLD
30 |-DSI0
31 |-DSI1
32 |-CORE
33 |-PER
34 |-PLLH
35 |-AUX
36 |-PIX
37 |-RCAL
38 |-STS
39 */
40
41 /***********************************************************************
42 *
43 * Common VCO stuff.
44 *
45 ***********************************************************************/
46
47 void BCM2708VCO::setDigValues() {
48 IODriverLog("setting DIG values for this VCO ...");
49
50 uint32_t dig0 = dig[0],
51 dig1 = dig[1],
52 dig2 = dig[2],
53 dig3 = dig[3];
54
55 /* 0xAA covers all possible HOLD bits in CM_PLLx regs */
56 *cmPllCtrl = CM_PASSWORD | 0xAA;
57
58 dig[3] = A2W_PASSWORD | (dig3);
59 dig[2] = A2W_PASSWORD | (dig2 & 0xFFEFFBFE);
60 dig[1] = A2W_PASSWORD | (dig1 & ~(1 << 14));
61 dig[0] = A2W_PASSWORD | (dig0);
62
63 *ctrl = A2W_PASSWORD | 0x20000 | *ctrl;
64
65 dig3 |= 0x42;
66
67 dig[3] = A2W_PASSWORD | (dig3);
68 dig[2] = A2W_PASSWORD | (dig2);
69 dig[1] = A2W_PASSWORD | (dig1);
70 dig[0] = A2W_PASSWORD | (dig0);
71 }
72
73 void BCM2708VCO::dumpDigValues() {
74 IODriverLog("DIG0: 0x%X, DIG1: 0x%X, DIG2: 0x%X, DIG3: 0x%X",
75 dig[0],
76 dig[1],
77 dig[2],
78 dig[3]);
79 }
80
81 /***********************************************************************
82 *
83 * PLL VCOs for specific PLLs.
84 *
85 ***********************************************************************/
86
87 struct BCM2708PLLB : BCM2708VCO {
88 IODriverConstructor(BCM2708PLLB);
89
90 /*
91 * Working: DIG0: 0xAAA030, DIG1: 0x403A, DIG2: 0x402401, DIG3: 0x2
92 */
93
94 virtual void init() override {
95 ctrl = RegToRef(A2W_PLLB_CTRL);
96 ana = RegToRef(A2W_PLLB_ANA0);
97 dig = RegToRef(A2W_PLLB_DIG0);
98 cmPllCtrl = RegToRef(CM_PLLB);
99
100 IODriverLog("PLLB VCO registered");
101
102 setTag('PLLB');
103 }
104 };
105 IODriverCreateSingletonInstance(BCM2708PLLB);
106
107 /***********************************************************************
108 *
109 * ARM Clock.
110 *
111 ***********************************************************************/
112
113 struct BCM2708ClockDomain : IODevice {
114 volatile uint32_t* cmDiv;
115 volatile uint32_t* cmCtrl;
116 };
117
118 struct BCM2708ArmClockDomain : BCM2708ClockDomain {
119
120 };
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