716e9180b0dba89de3230b05ac79a3010a617cae
[rpi-open-firmware.git] / start.s
1 /*=============================================================================
2 Copyright (C) 2016 Kristina Brooks
3 All rights reserved.
4
5 This program is free software; you can redistribute it and/or
6 modify it under the terms of the GNU General Public License
7 as published by the Free Software Foundation; either version 2
8 of the License, or (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 FILE DESCRIPTION
16 Entry.
17
18 A small explanation. The ROM loads bootcode.bin at 0x80000000 and jumps to
19 0x80000200. This region corresponds to L1/L2 cached IO and cache is never
20 evicted as long as we don't touch memory above that. This gives us 128KB
21 of memory at startup.
22
23 Exception names are from the public release from:
24 brcm_usrlib\dag\vmcsx\vcfw\rtos\none\rtos_none.c
25
26 =============================================================================*/
27
28
29 .text
30
31 empty_space:
32 .space 0x200
33
34 .include "ghetto.s"
35
36 /* main entry point */
37
38 .globl _start
39 .align 2
40 _start:
41 mov r0, cpuid
42 mov r5, r0
43
44 /* vectors */
45 mov r3, #0x1B000
46 mov r1, r3
47
48 /*
49 * populate the exception vector table using PC relative labels
50 * so the code isnt position dependent
51 */
52 .macro RegExceptionHandler label, exception_number
53 lea r2, fleh_\label
54 st r2, (r1)
55 add r1, #4
56 .endm
57
58
59 RegExceptionHandler zero, #0
60 RegExceptionHandler misaligned, #1
61 RegExceptionHandler dividebyzero, #2
62 RegExceptionHandler undefinedinstruction, #3
63 RegExceptionHandler forbiddeninstruction, #4
64 RegExceptionHandler illegalmemory, #5
65 RegExceptionHandler buserror, #6
66 RegExceptionHandler floatingpoint, #7
67 RegExceptionHandler isp, #8
68 RegExceptionHandler dummy, #9
69 RegExceptionHandler icache, #10
70 RegExceptionHandler veccore, #11
71 RegExceptionHandler badl2alias, #12
72 RegExceptionHandler breakpoint, #13
73 RegExceptionHandler unknown, #14
74
75 add r1, r3, #252
76 lea r2, fleh_irq
77 mov r4, #492
78
79 L_setup_hw_irq:
80 st r2, (r1)++
81 ble r1, r4, L_setup_hw_irq
82
83 /*
84 * load the interrupt and normal stack pointers. these
85 * are chosen to be near the top of the available cache memory
86 */
87
88 mov r28, #0x1D000
89 mov sp, #0x1C000
90
91 /* set interrupt vector bases */
92 mov r0, #IC0_VADDR
93 st r3, (r0)
94 mov r0, #IC1_VADDR
95 st r3, (r0)
96
97 /* jump to C code */
98 mov r0, r5
99 lea r1, _start
100
101 ei
102
103 bl _main
104
105 /************************************************************
106 * Debug
107 ************************************************************/
108
109 blinker:
110 mov r1, #GPFSEL1
111 ld r0, (r1)
112 and r0, #(~(7<<18))
113 or r0, #(1<<18)
114 st r0, (r1)
115 mov r1, #GPSET0
116 mov r2, #GPCLR0
117 mov r3, #(1<<16)
118 loop:
119 st r3, (r1)
120 mov r0, #0
121 delayloop1:
122 add r0, #1
123 cmp r0, #0x100000
124 bne delayloop1
125 st r3, (r2)
126 mov r0, #0
127 delayloop2:
128 add r0, #1
129 cmp r0, #0x100000
130 bne delayloop2
131 b loop
132
133 /************************************************************
134 * Exception Handling
135 ************************************************************/
136
137 .macro SaveRegsLower
138 push r0-r5, lr
139 .endm
140
141 .macro SaveRegsUpper
142 push r6-r15
143 push r16-r23
144 .endm
145
146 .macro SaveRegsAll
147 SaveRegsLower
148 SaveRegsUpper
149 .endm
150
151 fatal_exception:
152 SaveRegsUpper
153 mov r0, sp
154 b sleh_fatal
155
156 .macro ExceptionHandler label, exception_number
157 fleh_\label:
158 SaveRegsLower
159 mov r1, \exception_number
160 b fatal_exception
161 .endm
162
163 ExceptionHandler zero, #0
164 ExceptionHandler misaligned, #1
165 ExceptionHandler dividebyzero, #2
166 ExceptionHandler undefinedinstruction, #3
167 ExceptionHandler forbiddeninstruction, #4
168 ExceptionHandler illegalmemory, #5
169 ExceptionHandler buserror, #6
170 ExceptionHandler floatingpoint, #7
171 ExceptionHandler isp, #8
172 ExceptionHandler dummy, #9
173 ExceptionHandler icache, #10
174 ExceptionHandler veccore, #11
175 ExceptionHandler badl2alias, #12
176 ExceptionHandler breakpoint, #13
177 ExceptionHandler unknown, #14
178
179 fleh_irq:
180 SaveRegsAll
181
182 /* top of savearea */
183 mov r0, sp
184 bl sleh_irq
185
186 return_from_exception:
187 pop r16-r23
188 pop r6-r15
189 pop r0-r15
190 ld lr, (sp)++
191 rti
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