d36d9304ae1f4a4e59ab6a3e3abcb87425ba3338
[rpi-open-firmware.git] / start.s
1 /*=============================================================================
2 Copyright (C) 2016 Kristina Brooks
3 All rights reserved.
4
5 This program is free software; you can redistribute it and/or
6 modify it under the terms of the GNU General Public License
7 as published by the Free Software Foundation; either version 2
8 of the License, or (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 FILE DESCRIPTION
16 Entry.
17
18 A small explanation. The ROM loads bootcode.bin at 0x80000000 and jumps to
19 0x80000200. This region corresponds to L1/L2 cached IO and cache is never
20 evicted as long as we don't touch memory above that. This gives us 128KB
21 of memory at startup.
22
23 Exception names are from the public release from:
24 brcm_usrlib\dag\vmcsx\vcfw\rtos\none\rtos_none.c
25
26 =============================================================================*/
27
28
29 .text
30
31 empty_space:
32 .space 0x200
33
34 .include "ghetto.s"
35
36 /* main entry point */
37
38 .globl _start
39 .align 2
40 _start:
41 version r0
42 mov r5, r0
43
44 /* vectors */
45 mov r3, #0x1B000
46 mov r1, r3
47
48 /*
49 * populate the exception vector table using PC relative labels
50 * so the code isnt position dependent
51 */
52 .macro RegExceptionHandler label, exception_number
53 lea r2, fleh_\label
54 st r2, (r1)
55 add r1, #4
56 .endm
57
58
59 RegExceptionHandler zero, #0
60 RegExceptionHandler misaligned, #1
61 RegExceptionHandler dividebyzero, #2
62 RegExceptionHandler undefinedinstruction, #3
63 RegExceptionHandler forbiddeninstruction, #4
64 RegExceptionHandler illegalmemory, #5
65 RegExceptionHandler buserror, #6
66 RegExceptionHandler floatingpoint, #7
67 RegExceptionHandler isp, #8
68 RegExceptionHandler dummy, #9
69 RegExceptionHandler icache, #10
70 RegExceptionHandler veccore, #11
71 RegExceptionHandler badl2alias, #12
72 RegExceptionHandler breakpoint, #13
73 RegExceptionHandler unknown, #14
74
75 //add r1, r3, #252
76 add r1, r3, #128
77 lea r2, fleh_irq
78 //mov r4, #492
79 add r4, r3, #492
80
81 L_setup_hw_irq:
82 st r2, (r1)
83 add r1, #4
84 ble r1, r4, L_setup_hw_irq
85
86 /*
87 * load the interrupt and normal stack pointers. these
88 * are chosen to be near the top of the available cache memory
89 */
90
91 mov r28, #0x1D000
92 mov sp, #0x1C000
93
94 /* set interrupt vector bases */
95 mov r0, #IC0_VADDR
96 st r3, (r0)
97 mov r0, #IC1_VADDR
98 st r3, (r0)
99
100 /* enable interrupts */
101 ei
102
103 /* jump to C code */
104 mov r0, r5
105 lea r1, _start
106
107 bl _main
108
109 /************************************************************
110 * Debug
111 ************************************************************/
112
113 blinker:
114 mov r1, #GPFSEL1
115 ld r0, (r1)
116 and r0, #(~(7<<18))
117 or r0, #(1<<18)
118 st r0, (r1)
119 mov r1, #GPSET0
120 mov r2, #GPCLR0
121 mov r3, #(1<<16)
122 loop:
123 st r3, (r1)
124 mov r0, #0
125 delayloop1:
126 add r0, #1
127 cmp r0, #0x100000
128 bne delayloop1
129 st r3, (r2)
130 mov r0, #0
131 delayloop2:
132 add r0, #1
133 cmp r0, #0x100000
134 bne delayloop2
135 b loop
136
137 /************************************************************
138 * Exception Handling
139 ************************************************************/
140
141 .macro SaveRegsLower
142 stm lr, (--sp)
143 stm r0-r5, (--sp)
144 .endm
145
146 .macro SaveRegsUpper
147 stm r6-r15, (--sp)
148 stm r16-r23, (--sp)
149 .endm
150
151 .macro SaveRegsAll
152 SaveRegsLower
153 SaveRegsUpper
154 .endm
155
156 fatal_exception:
157 SaveRegsUpper
158 mov r0, sp
159 b sleh_fatal
160
161 .macro ExceptionHandler label, exception_number
162 fleh_\label:
163 SaveRegsLower
164 mov r1, \exception_number
165 b fatal_exception
166 .endm
167
168 ExceptionHandler zero, #0
169 ExceptionHandler misaligned, #1
170 ExceptionHandler dividebyzero, #2
171 ExceptionHandler undefinedinstruction, #3
172 ExceptionHandler forbiddeninstruction, #4
173 ExceptionHandler illegalmemory, #5
174 ExceptionHandler buserror, #6
175 ExceptionHandler floatingpoint, #7
176 ExceptionHandler isp, #8
177 ExceptionHandler dummy, #9
178 ExceptionHandler icache, #10
179 ExceptionHandler veccore, #11
180 ExceptionHandler badl2alias, #12
181 ExceptionHandler breakpoint, #13
182 ExceptionHandler unknown, #14
183
184 fleh_irq:
185 SaveRegsAll
186
187 /* top of savearea */
188 mov r0, sp
189 bl sleh_irq
190
191 return_from_exception:
192 ldm r16-r23, (sp++)
193 ldm r6-r15, (sp++)
194 ldm r0-r5, (sp++)
195 ld lr, (sp++)
196 rti
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