Merge pull request #36 from Nom-DePlume/master
[rpi-open-firmware.git] / start.s
1 /*=============================================================================
2 Copyright (C) 2016-2017 Authors of rpi-open-firmware
3 All rights reserved.
4
5 This program is free software; you can redistribute it and/or
6 modify it under the terms of the GNU General Public License
7 as published by the Free Software Foundation; either version 2
8 of the License, or (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 FILE DESCRIPTION
16 Entry.
17
18 A small explanation. The ROM loads bootcode.bin at 0x80000000 and jumps to
19 0x80000200. This region corresponds to L1/L2 cached IO and cache is never
20 evicted as long as we don't touch memory above that. This gives us 128KB
21 of memory at startup.
22
23 Exception names are from the public release from:
24 brcm_usrlib\dag\vmcsx\vcfw\rtos\none\rtos_none.c
25
26 =============================================================================*/
27
28 .text
29
30 empty_space:
31 .space 0x200
32
33 /* MMIO-mapped registers for the interrupt table */
34
35 .set IC0_BASE, 0x7e002000
36 .set IC0_VADDR, 0x7e002030
37
38 .set IC1_BASE, 0x7e002800
39 .set IC1_VADDR, 0x7e002830
40
41 /* main entry point */
42
43 .globl _start
44 .align 2
45 _start:
46 version r0
47 mov r5, r0
48
49 /* vectors */
50 mov r3, #0x1B000
51 mov r1, r3
52
53 /*
54 * populate the exception vector table using PC relative labels
55 * so the code isnt position dependent
56 */
57 .macro RegExceptionHandler label, exception_number
58 lea r2, fleh_\label
59 st r2, (r1)
60 add r1, #4
61 .endm
62
63 RegExceptionHandler zero, #0
64 RegExceptionHandler misaligned, #1
65 RegExceptionHandler dividebyzero, #2
66 RegExceptionHandler undefinedinstruction, #3
67 RegExceptionHandler forbiddeninstruction, #4
68 RegExceptionHandler illegalmemory, #5
69 RegExceptionHandler buserror, #6
70 RegExceptionHandler floatingpoint, #7
71 RegExceptionHandler isp, #8
72 RegExceptionHandler dummy, #9
73 RegExceptionHandler icache, #10
74 RegExceptionHandler veccore, #11
75 RegExceptionHandler badl2alias, #12
76 RegExceptionHandler breakpoint, #13
77 RegExceptionHandler unknown, #14
78 RegExceptionHandler unknown, #15
79 RegExceptionHandler unknown, #16
80 RegExceptionHandler unknown, #17
81 RegExceptionHandler unknown, #18
82 RegExceptionHandler unknown, #19
83 RegExceptionHandler unknown, #20
84 RegExceptionHandler unknown, #21
85 RegExceptionHandler unknown, #22
86 RegExceptionHandler unknown, #23
87 RegExceptionHandler unknown, #24
88 RegExceptionHandler unknown, #25
89 RegExceptionHandler unknown, #26
90 RegExceptionHandler unknown, #27
91 RegExceptionHandler unknown, #28
92 RegExceptionHandler unknown, #29
93 RegExceptionHandler unknown, #30
94 RegExceptionHandler unknown, #31
95
96 add r1, r3, #128
97 lea r2, fleh_irq
98 add r4, r3, #572
99
100 L_setup_hw_irq:
101 st r2, (r1)
102 add r1, #4
103 ble r1, r4, L_setup_hw_irq
104
105 /*
106 * load the interrupt and normal stack pointers. these
107 * are chosen to be near the top of the available cache memory
108 */
109
110 mov r28, #0x1D000
111 mov sp, #0x1C000
112
113 /* jump to C code */
114 mov r0, r5
115 lea r1, _start
116
117 bl _main
118
119 /************************************************************
120 * Exception Handling
121 ************************************************************/
122
123 .macro SaveRegsLower
124 stm lr, (--sp)
125 stm r0-r5, (--sp)
126 .endm
127
128 .macro SaveRegsUpper
129 stm r6-r15, (--sp)
130 stm r16-r23, (--sp)
131 .endm
132
133 .macro SaveRegsAll
134 SaveRegsLower
135 SaveRegsUpper
136 .endm
137
138 fatal_exception:
139 SaveRegsUpper
140 mov r0, sp
141 b sleh_fatal
142
143 .macro ExceptionHandler label, exception_number
144 fleh_\label:
145 SaveRegsLower
146 mov r1, \exception_number
147 b fatal_exception
148 .endm
149
150 ExceptionHandler zero, #0
151 ExceptionHandler misaligned, #1
152 ExceptionHandler dividebyzero, #2
153 ExceptionHandler undefinedinstruction, #3
154 ExceptionHandler forbiddeninstruction, #4
155 ExceptionHandler illegalmemory, #5
156 ExceptionHandler buserror, #6
157 ExceptionHandler floatingpoint, #7
158 ExceptionHandler isp, #8
159 ExceptionHandler dummy, #9
160 ExceptionHandler icache, #10
161 ExceptionHandler veccore, #11
162 ExceptionHandler badl2alias, #12
163 ExceptionHandler breakpoint, #13
164 ExceptionHandler unknown, #14
165
166 fleh_irq:
167 SaveRegsAll
168
169 /* top of savearea */
170 mov r0, sp
171 mov r1, r29
172 bl sleh_irq
173
174 return_from_exception:
175 ldm r16-r23, (sp++)
176 ldm r6-r15, (sp++)
177 ldm r0-r5, (sp++)
178 ld lr, (sp++)
179 rti
180
181 /* include chainloader */
182
183 .align 2
184 .globl L_arm_code_start
185 L_arm_code_start:
186
187 .incbin "arm_chainloader/build/arm_chainloader.bin"
188
189 .globl L_arm_code_end
190 L_arm_code_end:
This page took 0.091748 seconds and 5 git commands to generate.