remove old files
authorchristinaa <kristinaa@tuta.io>
Fri, 6 Jan 2017 13:30:13 +0000 (13:30 +0000)
committerchristinaa <kristinaa@tuta.io>
Fri, 6 Jan 2017 13:30:13 +0000 (13:30 +0000)
arm_chainloader/minicxx.cc [deleted file]
arm_loader.c [deleted file]
arm_loader.cc [new file with mode: 0644]

diff --git a/arm_chainloader/minicxx.cc b/arm_chainloader/minicxx.cc
deleted file mode 100644 (file)
index 12cb49f..0000000
+++ /dev/null
@@ -1,42 +0,0 @@
-/*=============================================================================\r
-Copyright (C) 2016-2017 Authors of rpi-open-firmware\r
-All rights reserved.\r
-\r
-This program is free software; you can redistribute it and/or\r
-modify it under the terms of the GNU General Public License\r
-as published by the Free Software Foundation; either version 2\r
-of the License, or (at your option) any later version.\r
-\r
-This program is distributed in the hope that it will be useful,\r
-but WITHOUT ANY WARRANTY; without even the implied warranty of\r
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
-GNU General Public License for more details.\r
-\r
-FILE DESCRIPTION\r
-Crappy C++ runtime.\r
-\r
-=============================================================================*/\r
-\r
-#include <stdint.h>\r
-#include <chainloader.h>\r
-#include <hardware.h>\r
-\r
-void* operator new[] (size_t sz) {\r
-       return malloc(sz);\r
-}\r
-\r
-void* operator new (size_t sz) {\r
-       return malloc(sz);\r
-}\r
-\r
-void operator delete (void* ptr) {\r
-       free(ptr);\r
-}\r
-\r
-void operator delete[] (void* ptr) {\r
-       free(ptr);\r
-}\r
-\r
-extern "C" void __cxa_pure_virtual() {\r
-       panic("__cxa_pure_virtual!");\r
-}
\ No newline at end of file
diff --git a/arm_loader.c b/arm_loader.c
deleted file mode 100644 (file)
index 775d758..0000000
+++ /dev/null
@@ -1,269 +0,0 @@
-/*=============================================================================\r
-Copyright (C) 2016-2017 Authors of rpi-open-firmware\r
-All rights reserved.\r
-\r
-This program is free software; you can redistribute it and/or\r
-modify it under the terms of the GNU General Public License\r
-as published by the Free Software Foundation; either version 2\r
-of the License, or (at your option) any later version.\r
-\r
-This program is distributed in the hope that it will be useful,\r
-but WITHOUT ANY WARRANTY; without even the implied warranty of\r
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
-GNU General Public License for more details.\r
-\r
-FILE DESCRIPTION\r
-ARM initialization stuff.\r
-\r
-=============================================================================*/\r
-\r
-#include <common.h>\r
-#include "hardware.h"\r
-\r
-\r
-#define logf(fmt, ...) printf("[ARMLDR:%s]: " fmt, __FUNCTION__, ##__VA_ARGS__);\r
-\r
-extern char L_arm_code_start;\r
-extern char L_arm_code_end;\r
-\r
-#define ARM_MEMORY_BASE 0xC0000000\r
-#define ARM_BKPT_OPCODE 0xE1200070\r
-\r
-/* XXX: What is this? */\r
-#define PM_UNK_CFG_CLR 0xFFFCFFFF\r
-\r
-static bool power_wait_bit(uint32_t bit) {\r
-       for (int i = 0; i < 20; i++) {\r
-               if (PM_PROC & bit) {\r
-                       return true;\r
-               }\r
-               udelay(100);\r
-       }\r
-       return false;\r
-}\r
-\r
-static inline void assert_global_reset() {\r
-       logf("RSTN ...\n");\r
-       PM_PROC |= PM_PASSWORD | PM_PROC_ARMRSTN_SET;\r
-       udelay(300);\r
-}\r
-\r
-static void enable_power() {\r
-       uint32_t pmv;\r
-\r
-       logf("INIT PM_PROC: 0x%X\n", PM_PROC);\r
-\r
-       logf("requesting power up ...\n");\r
-\r
-       /* deassert all reset lines */\r
-       pmv = ((PM_PROC & PM_PROC_ARMRSTN_CLR) & PM_UNK_CFG_CLR) | PM_PASSWORD;\r
-\r
-       PM_PROC = pmv;\r
-\r
-       pmv |= PM_PROC_POWUP_SET;\r
-       udelay(10);\r
-       PM_PROC = pmv;\r
-\r
-       logf("POWUP PM_PROC: 0x%X\n", PM_PROC); \r
-\r
-       /* wait for POWOK */\r
-       logf("waiting for power up ...\n");\r
-       for (int i = 1; i < 5; i++) {\r
-               if (!power_wait_bit(PM_PROC_POWOK_SET)) {\r
-                       /* only go up to 3 */\r
-                       if (i == 4) {\r
-                               panic("timed out waiting for power up, state of PM_PROC is: 0x%X", PM_PROC);\r
-                       }\r
-\r
-                       pmv = (pmv & PM_UNK_CFG_CLR) | (i << PM_PROC_CFG_LSB);\r
-                       logf("timed out, trying different CFG: 0x%X \n", pmv);\r
-                       PM_PROC = pmv;\r
-               }\r
-       }\r
-       \r
-       pmv |= PM_PROC_ISPOW_SET;\r
-       PM_PROC = pmv;\r
-\r
-       pmv |= PM_PROC_MEMREP_SET;\r
-       PM_PROC = pmv;\r
-\r
-       logf("waiting for MRDONE ...\n");\r
-       if (!power_wait_bit(PM_PROC_MRDONE_SET)) {\r
-               panic("timed out waiting for MRDONE, state of PM_PROC is: 0x%X", PM_PROC);\r
-       }\r
-\r
-       logf("setting ISFUNC ...\n");\r
-\r
-       pmv |= PM_PROC_ISFUNC_SET;\r
-       PM_PROC = pmv;\r
-\r
-       logf("ARM power domain initialized succesfully, state of PM_PROC is: 0x%X!\n", PM_PROC);\r
-}\r
-\r
-static void bresp_cycle_write(uint32_t bits) {\r
-       ARM_CONTROL0 = (ARM_CONTROL0 & ~(ARM_C0_BRESP1|ARM_C0_BRESP2)) | bits;\r
-       printf("0x%X,", bits);\r
-       udelay(30);\r
-}\r
-\r
-static uint32_t g_BrespTab[] = {\r
-       0x10, 0x14, 0x10, 0x14, 0x10, 0x14, 0x10, 0x14, 0x10, 0x1C, 0x18, 0x1C, 0x18, 0x0,\r
-       0x10, 0x14, 0x10, 0x1C, 0x10, 0x14, 0x10, 0x14, 0x10, 0x14, 0x10, 0x14, 0x10, 0x0,\r
-       0x10, 0x14, 0x10, 0x1C, 0x18, 0x1C, 0x10, 0x14, 0x18, 0x1C, 0x10, 0x14, 0x10, 0x0,\r
-       0x10, 0x14, 0x18, 0x14, 0x10, 0x14, 0x10, 0x14, 0x10, 0x14, 0x10, 0x14, 0x10, 0x0,\r
-       0x10, 0x14, 0x18, 0x14, 0x18, 0x14, 0x10, 0x14, 0x10, 0x14, 0x10, 0x14, 0x18, 0x0\r
-};\r
-static void do_bresp_cycle() {\r
-       /* my little axi - peripherals are magic */\r
-       logf("Cycling AXI bits ...\n\t");\r
-       \r
-       for (int i = 0; i < sizeof(g_BrespTab)/sizeof(g_BrespTab[0]); i++) {\r
-               bresp_cycle_write(g_BrespTab[i]);\r
-\r
-               if (i && ((i % 14) == 0))\r
-                       printf("\n\t");\r
-       }\r
-\r
-       printf("\n");\r
-}\r
-\r
-void setup_bridge(bool bresp_cycle) {\r
-       logf("setting up async bridge ...\n");\r
\r
-       if (bresp_cycle) {\r
-               assert_global_reset();\r
-               do_bresp_cycle();\r
-               assert_global_reset();\r
-               udelay(300);\r
-       }\r
-\r
-       ARM_CONTROL1 &= ~ARM_C1_REQSTOP;\r
-       udelay(300);\r
-\r
-       if (!bresp_cycle) \r
-               assert_global_reset();\r
-       \r
-       logf("bridge init done, PM_PROC is now: 0x%X!\n", PM_PROC);\r
-}\r
-\r
-static void set_clock_source(unsigned int source) {\r
-       CM_ARMCTL = CM_PASSWORD | source | CM_ARMCTL_ENAB_SET;\r
-}\r
-\r
-static void enable_clock() {\r
-       logf("initializing PLLB ...\n");\r
-\r
-       /* oscillator->pllb */\r
-       A2W_XOSC_CTRL |= A2W_PASSWORD | A2W_XOSC_CTRL_PLLBEN_SET;\r
-\r
-       A2W_PLLB_FRAC = A2W_PASSWORD | 0xeaaa8;\r
-       A2W_PLLB_CTRL = A2W_PASSWORD | 48 | 0x1000;\r
-\r
-       CM_PLLB = CM_PASSWORD | CM_PLLB_DIGRST_SET | CM_PLLB_ANARST_SET;\r
-       CM_PLLB = CM_PASSWORD | CM_PLLB_DIGRST_SET | CM_PLLB_ANARST_SET | CM_PLLB_HOLDARM_SET;\r
-\r
-       A2W_PLLB_ANA3 = A2W_PASSWORD | 0x100;\r
-       A2W_PLLB_ANA2 = A2W_PASSWORD | 0x0;\r
-       A2W_PLLB_ANA1 = A2W_PASSWORD | 0x140000;\r
-       A2W_PLLB_ANA0 = A2W_PASSWORD | 0x0;\r
-\r
-       A2W_PLLB_DIG3 = A2W_PASSWORD | 0x0;\r
-       A2W_PLLB_DIG2 = A2W_PASSWORD | 0x400000;\r
-       A2W_PLLB_DIG1 = A2W_PASSWORD | 0x3a;\r
-       A2W_PLLB_DIG0 = A2W_PASSWORD | 48 | 0xAAA000;\r
-\r
-       A2W_PLLB_CTRL = A2W_PASSWORD | 48 | 0x21000;\r
-\r
-       A2W_PLLB_DIG3 = A2W_PASSWORD | 0x2;\r
-       A2W_PLLB_DIG2 = A2W_PASSWORD | 0x402401;\r
-       A2W_PLLB_DIG1 = A2W_PASSWORD | 0x403a;\r
-       A2W_PLLB_DIG0 = A2W_PASSWORD | 48 | 0xAAA000;\r
-\r
-       A2W_PLLB_ARM = A2W_PASSWORD | 2;\r
-\r
-       CM_PLLB = CM_PASSWORD | CM_PLLB_DIGRST_SET | CM_PLLB_ANARST_SET | CM_PLLB_HOLDARM_SET | CM_PLLB_LOADARM_SET;\r
-       CM_PLLB = CM_PASSWORD | CM_PLLB_DIGRST_SET | CM_PLLB_ANARST_SET | CM_PLLB_HOLDARM_SET;\r
-       CM_PLLB = CM_PASSWORD;\r
-\r
-       set_clock_source(4);\r
-\r
-       logf("KAIP  = 0x%X\n", A2W_PLLB_ANA_KAIP);\r
-       logf("MULTI = 0x%X\n", A2W_PLLB_ANA_MULTI);\r
-\r
-       logf("ARM clock succesfully initialized!\n");\r
-}\r
-\r
-static void arm_load_code() {\r
-       uint32_t* mem = (uint32_t*)(ARM_MEMORY_BASE);\r
-\r
-       uint8_t* start = &L_arm_code_start;\r
-       uint8_t* end = &L_arm_code_end;\r
-       uint32_t size = (uint32_t)(end - start);\r
-\r
-       bcopy(start, mem, size);\r
-\r
-       logf("copied %d bytes to 0x%X!\n", size, ARM_MEMORY_BASE);\r
-\r
-       /* verify */\r
-       for (int i = 0; i < size; i++) {\r
-               uint8_t* mem8 = (uint8_t*)(mem);\r
-               if (start[i] != mem8[i])\r
-                       panic("copy failed at 0x%X expected 0x%X, got 0x%X", (uint32_t)&mem8[i],\r
-                               *((uint32_t*)&mem8[i]),\r
-                               *((uint32_t*)&start[i]));\r
-       }\r
-}\r
-\r
-static void arm_pmap_enter(uint32_t bus_address, uint32_t arm_address) {\r
-       volatile uint32_t* tte = &ARM_TRANSLATE;\r
-       uint32_t index = arm_address >> 24;\r
-       uint32_t pte = bus_address >> 21;\r
-\r
-       tte[index] = pte; \r
-\r
-       //logf("Translation: [0x%X => 0x%X] 0x%X => 0x%X\n", index * 4, bus_address >> 21, bus_address, arm_address);\r
-}\r
-\r
-/*\r
-#define ARM_C0_PRIO_PER  0x00F00000 // per priority mask\r
-#define ARM_C0_PRIO_L2   0x0F000000\r
-#define ARM_C0_PRIO_UC   0xF0000000\r
- */\r
-\r
-void arm_init() {\r
-       logf("arm init started\n");\r
-\r
-       arm_load_code();\r
-\r
-       logf("original memstart: 0x%X\n", *((volatile uint32_t*)ARM_MEMORY_BASE));\r
-\r
-       for (uint32_t i = 0; i < 62; i++) {\r
-               uint32_t offset = i * 0x1000000;\r
-               arm_pmap_enter(ARM_MEMORY_BASE + offset, 0x0 + offset);\r
-       }\r
-\r
-       logf("mapped VC 0x%X to ARM 0x%X\n", ARM_MEMORY_BASE, 0);\r
-\r
-       arm_pmap_enter(VC4_PERIPH_BASE, ARM_PERIPH_BASE);\r
-\r
-       logf("mapped peripherals VC 0x%X to ARM 0x%X\n", VC4_PERIPH_BASE, ARM_PERIPH_BASE);\r
-\r
-       /* see if the ARM block is responding */\r
-       logf("ARM ID: 0x%X C0: 0x%X\n", ARM_ID, ARM_CONTROL0);\r
-\r
-       /*\r
-        * enable peripheral access, map arm secure bits to axi secure bits 1:1 and\r
-        * set the mem size for who knows what reason.\r
-        */\r
-       ARM_CONTROL0 |= 0x008 | ARM_C0_APROTSYST | ARM_C0_SIZ1G | ARM_C0_FULLPERI;\r
-        ARM_CONTROL1 |= ARM_C1_PERSON;\r
-\r
-        ARM_IRQ_ENBL3 |= ARM_IE_MAIL;\r
-\r
-       logf("using C0: 0x%X\n", ARM_CONTROL0);\r
-\r
-       enable_clock();\r
-       enable_power();\r
-       /* start io bridge */\r
-       setup_bridge(true);\r
-}\r
diff --git a/arm_loader.cc b/arm_loader.cc
new file mode 100644 (file)
index 0000000..613df9c
--- /dev/null
@@ -0,0 +1,269 @@
+/*=============================================================================\r
+Copyright (C) 2016-2017 Authors of rpi-open-firmware\r
+All rights reserved.\r
+\r
+This program is free software; you can redistribute it and/or\r
+modify it under the terms of the GNU General Public License\r
+as published by the Free Software Foundation; either version 2\r
+of the License, or (at your option) any later version.\r
+\r
+This program is distributed in the hope that it will be useful,\r
+but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+GNU General Public License for more details.\r
+\r
+FILE DESCRIPTION\r
+ARM initialization stuff.\r
+\r
+=============================================================================*/\r
+\r
+#include <common.h>\r
+#include "hardware.h"\r
+\r
+\r
+#define logf(fmt, ...) printf("[ARMLDR:%s]: " fmt, __FUNCTION__, ##__VA_ARGS__);\r
+\r
+extern uint8_t L_arm_code_start;\r
+extern uint8_t L_arm_code_end;\r
+\r
+#define ARM_MEMORY_BASE 0xC0000000\r
+#define ARM_BKPT_OPCODE 0xE1200070\r
+\r
+/* XXX: What is this? */\r
+#define PM_UNK_CFG_CLR 0xFFFCFFFF\r
+\r
+static bool power_wait_bit(uint32_t bit) {\r
+       for (int i = 0; i < 20; i++) {\r
+               if (PM_PROC & bit) {\r
+                       return true;\r
+               }\r
+               udelay(100);\r
+       }\r
+       return false;\r
+}\r
+\r
+static inline void assert_global_reset() {\r
+       logf("RSTN ...\n");\r
+       PM_PROC |= PM_PASSWORD | PM_PROC_ARMRSTN_SET;\r
+       udelay(300);\r
+}\r
+\r
+static void enable_power() {\r
+       uint32_t pmv;\r
+\r
+       logf("INIT PM_PROC: 0x%X\n", PM_PROC);\r
+\r
+       logf("requesting power up ...\n");\r
+\r
+       /* deassert all reset lines */\r
+       pmv = ((PM_PROC & PM_PROC_ARMRSTN_CLR) & PM_UNK_CFG_CLR) | PM_PASSWORD;\r
+\r
+       PM_PROC = pmv;\r
+\r
+       pmv |= PM_PROC_POWUP_SET;\r
+       udelay(10);\r
+       PM_PROC = pmv;\r
+\r
+       logf("POWUP PM_PROC: 0x%X\n", PM_PROC); \r
+\r
+       /* wait for POWOK */\r
+       logf("waiting for power up ...\n");\r
+       for (int i = 1; i < 5; i++) {\r
+               if (!power_wait_bit(PM_PROC_POWOK_SET)) {\r
+                       /* only go up to 3 */\r
+                       if (i == 4) {\r
+                               panic("timed out waiting for power up, state of PM_PROC is: 0x%X", PM_PROC);\r
+                       }\r
+\r
+                       pmv = (pmv & PM_UNK_CFG_CLR) | (i << PM_PROC_CFG_LSB);\r
+                       logf("timed out, trying different CFG: 0x%X \n", pmv);\r
+                       PM_PROC = pmv;\r
+               }\r
+       }\r
+       \r
+       pmv |= PM_PROC_ISPOW_SET;\r
+       PM_PROC = pmv;\r
+\r
+       pmv |= PM_PROC_MEMREP_SET;\r
+       PM_PROC = pmv;\r
+\r
+       logf("waiting for MRDONE ...\n");\r
+       if (!power_wait_bit(PM_PROC_MRDONE_SET)) {\r
+               panic("timed out waiting for MRDONE, state of PM_PROC is: 0x%X", PM_PROC);\r
+       }\r
+\r
+       logf("setting ISFUNC ...\n");\r
+\r
+       pmv |= PM_PROC_ISFUNC_SET;\r
+       PM_PROC = pmv;\r
+\r
+       logf("ARM power domain initialized succesfully, state of PM_PROC is: 0x%X!\n", PM_PROC);\r
+}\r
+\r
+static void bresp_cycle_write(uint32_t bits) {\r
+       ARM_CONTROL0 = (ARM_CONTROL0 & ~(ARM_C0_BRESP1|ARM_C0_BRESP2)) | bits;\r
+       printf("0x%X,", bits);\r
+       udelay(30);\r
+}\r
+\r
+static uint32_t g_BrespTab[] = {\r
+       0x10, 0x14, 0x10, 0x14, 0x10, 0x14, 0x10, 0x14, 0x10, 0x1C, 0x18, 0x1C, 0x18, 0x0,\r
+       0x10, 0x14, 0x10, 0x1C, 0x10, 0x14, 0x10, 0x14, 0x10, 0x14, 0x10, 0x14, 0x10, 0x0,\r
+       0x10, 0x14, 0x10, 0x1C, 0x18, 0x1C, 0x10, 0x14, 0x18, 0x1C, 0x10, 0x14, 0x10, 0x0,\r
+       0x10, 0x14, 0x18, 0x14, 0x10, 0x14, 0x10, 0x14, 0x10, 0x14, 0x10, 0x14, 0x10, 0x0,\r
+       0x10, 0x14, 0x18, 0x14, 0x18, 0x14, 0x10, 0x14, 0x10, 0x14, 0x10, 0x14, 0x18, 0x0\r
+};\r
+static void do_bresp_cycle() {\r
+       /* my little axi - peripherals are magic */\r
+       logf("Cycling AXI bits ...\n\t");\r
+       \r
+       for (int i = 0; i < sizeof(g_BrespTab)/sizeof(g_BrespTab[0]); i++) {\r
+               bresp_cycle_write(g_BrespTab[i]);\r
+\r
+               if (i && ((i % 14) == 0))\r
+                       printf("\n\t");\r
+       }\r
+\r
+       printf("\n");\r
+}\r
+\r
+void setup_bridge(bool bresp_cycle) {\r
+       logf("setting up async bridge ...\n");\r
\r
+       if (bresp_cycle) {\r
+               assert_global_reset();\r
+               do_bresp_cycle();\r
+               assert_global_reset();\r
+               udelay(300);\r
+       }\r
+\r
+       ARM_CONTROL1 &= ~ARM_C1_REQSTOP;\r
+       udelay(300);\r
+\r
+       if (!bresp_cycle) \r
+               assert_global_reset();\r
+       \r
+       logf("bridge init done, PM_PROC is now: 0x%X!\n", PM_PROC);\r
+}\r
+\r
+static void set_clock_source(unsigned int source) {\r
+       CM_ARMCTL = CM_PASSWORD | source | CM_ARMCTL_ENAB_SET;\r
+}\r
+\r
+static void enable_clock() {\r
+       logf("initializing PLLB ...\n");\r
+\r
+       /* oscillator->pllb */\r
+       A2W_XOSC_CTRL |= A2W_PASSWORD | A2W_XOSC_CTRL_PLLBEN_SET;\r
+\r
+       A2W_PLLB_FRAC = A2W_PASSWORD | 0xeaaa8;\r
+       A2W_PLLB_CTRL = A2W_PASSWORD | 48 | 0x1000;\r
+\r
+       CM_PLLB = CM_PASSWORD | CM_PLLB_DIGRST_SET | CM_PLLB_ANARST_SET;\r
+       CM_PLLB = CM_PASSWORD | CM_PLLB_DIGRST_SET | CM_PLLB_ANARST_SET | CM_PLLB_HOLDARM_SET;\r
+\r
+       A2W_PLLB_ANA3 = A2W_PASSWORD | 0x100;\r
+       A2W_PLLB_ANA2 = A2W_PASSWORD | 0x0;\r
+       A2W_PLLB_ANA1 = A2W_PASSWORD | 0x140000;\r
+       A2W_PLLB_ANA0 = A2W_PASSWORD | 0x0;\r
+\r
+       A2W_PLLB_DIG3 = A2W_PASSWORD | 0x0;\r
+       A2W_PLLB_DIG2 = A2W_PASSWORD | 0x400000;\r
+       A2W_PLLB_DIG1 = A2W_PASSWORD | 0x3a;\r
+       A2W_PLLB_DIG0 = A2W_PASSWORD | 48 | 0xAAA000;\r
+\r
+       A2W_PLLB_CTRL = A2W_PASSWORD | 48 | 0x21000;\r
+\r
+       A2W_PLLB_DIG3 = A2W_PASSWORD | 0x2;\r
+       A2W_PLLB_DIG2 = A2W_PASSWORD | 0x402401;\r
+       A2W_PLLB_DIG1 = A2W_PASSWORD | 0x403a;\r
+       A2W_PLLB_DIG0 = A2W_PASSWORD | 48 | 0xAAA000;\r
+\r
+       A2W_PLLB_ARM = A2W_PASSWORD | 2;\r
+\r
+       CM_PLLB = CM_PASSWORD | CM_PLLB_DIGRST_SET | CM_PLLB_ANARST_SET | CM_PLLB_HOLDARM_SET | CM_PLLB_LOADARM_SET;\r
+       CM_PLLB = CM_PASSWORD | CM_PLLB_DIGRST_SET | CM_PLLB_ANARST_SET | CM_PLLB_HOLDARM_SET;\r
+       CM_PLLB = CM_PASSWORD;\r
+\r
+       set_clock_source(4);\r
+\r
+       logf("KAIP  = 0x%X\n", A2W_PLLB_ANA_KAIP);\r
+       logf("MULTI = 0x%X\n", A2W_PLLB_ANA_MULTI);\r
+\r
+       logf("ARM clock succesfully initialized!\n");\r
+}\r
+\r
+static void arm_load_code() {\r
+       uint32_t* mem = (uint32_t*)(ARM_MEMORY_BASE);\r
+\r
+       uint8_t* start = &L_arm_code_start;\r
+       uint8_t* end = &L_arm_code_end;\r
+       uint32_t size = (uint32_t)(end - start);\r
+\r
+       bcopy(start, mem, size);\r
+\r
+       logf("copied %d bytes to 0x%X!\n", size, ARM_MEMORY_BASE);\r
+\r
+       /* verify */\r
+       for (int i = 0; i < size; i++) {\r
+               uint8_t* mem8 = (uint8_t*)(mem);\r
+               if (start[i] != mem8[i])\r
+                       panic("copy failed at 0x%X expected 0x%X, got 0x%X", (uint32_t)&mem8[i],\r
+                               *((uint32_t*)&mem8[i]),\r
+                               *((uint32_t*)&start[i]));\r
+       }\r
+}\r
+\r
+static void arm_pmap_enter(uint32_t bus_address, uint32_t arm_address) {\r
+       volatile uint32_t* tte = &ARM_TRANSLATE;\r
+       uint32_t index = arm_address >> 24;\r
+       uint32_t pte = bus_address >> 21;\r
+\r
+       tte[index] = pte; \r
+\r
+       //logf("Translation: [0x%X => 0x%X] 0x%X => 0x%X\n", index * 4, bus_address >> 21, bus_address, arm_address);\r
+}\r
+\r
+/*\r
+#define ARM_C0_PRIO_PER  0x00F00000 // per priority mask\r
+#define ARM_C0_PRIO_L2   0x0F000000\r
+#define ARM_C0_PRIO_UC   0xF0000000\r
+ */\r
+\r
+extern "C" void arm_init() {\r
+       logf("arm init started\n");\r
+\r
+       arm_load_code();\r
+\r
+       logf("original memstart: 0x%X\n", *((volatile uint32_t*)ARM_MEMORY_BASE));\r
+\r
+       for (uint32_t i = 0; i < 62; i++) {\r
+               uint32_t offset = i * 0x1000000;\r
+               arm_pmap_enter(ARM_MEMORY_BASE + offset, 0x0 + offset);\r
+       }\r
+\r
+       logf("mapped VC 0x%X to ARM 0x%X\n", ARM_MEMORY_BASE, 0);\r
+\r
+       arm_pmap_enter(VC4_PERIPH_BASE, ARM_PERIPH_BASE);\r
+\r
+       logf("mapped peripherals VC 0x%X to ARM 0x%X\n", VC4_PERIPH_BASE, ARM_PERIPH_BASE);\r
+\r
+       /* see if the ARM block is responding */\r
+       logf("ARM ID: 0x%X C0: 0x%X\n", ARM_ID, ARM_CONTROL0);\r
+\r
+       /*\r
+        * enable peripheral access, map arm secure bits to axi secure bits 1:1 and\r
+        * set the mem size for who knows what reason.\r
+        */\r
+       ARM_CONTROL0 |= 0x008 | ARM_C0_APROTSYST | ARM_C0_SIZ1G | ARM_C0_FULLPERI;\r
+        ARM_CONTROL1 |= ARM_C1_PERSON;\r
+\r
+        ARM_IRQ_ENBL3 |= ARM_IE_MAIL;\r
+\r
+       logf("using C0: 0x%X\n", ARM_CONTROL0);\r
+\r
+       enable_clock();\r
+       enable_power();\r
+       /* start io bridge */\r
+       setup_bridge(true);\r
+}\r
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