#version 310 es
precision highp float;

layout(local_size_x = 16, local_size_y = 1, local_size_z = 1) in;

layout(std430, binding = 0) buffer Inputs {
	vec4 foobar;
	vec4 colours[];
};

void main() {
	foobar = -foobar;
}

----------------------------------

shader: MESA_SHADER_COMPUTE
name: GLSL0
workgroup-size: 16, 1, 1
shared-size: 0
inputs: 0
outputs: 0
uniforms: 0
shared: 0
decl_var ssbo INTERP_MODE_NONE highp vec4[] colours (1, 0, 0)
decl_var ssbo INTERP_MODE_NONE highp vec4 foobar (0, 0, 0)
decl_function main (0 params)

impl main {
	block block_0:
	/* preds: */
	vec1 32 ssa_0 = load_const (0x00000000 /* 0.000000 */)
	vec1 64 ssa_1 = intrinsic load_ssbo_address (ssa_0) ()
	vec4 32 ssa_2 = intrinsic load_global (ssa_1) (0, 1073741824, 0) /* access=0 */ /* align_mul=1073741824 */ /* align_offset=0 */
	vec1 32 ssa_3 = fneg ssa_2.x
	vec1 32 ssa_4 = fneg ssa_2.y
	vec1 32 ssa_5 = fneg ssa_2.z
	vec1 32 ssa_6 = fneg ssa_2.w
	vec4 32 ssa_7 = vec4 ssa_3, ssa_4, ssa_5, ssa_6
	intrinsic store_global (ssa_7, ssa_1) (15, 0, 1073741824, 0) /* wrmask=xyzw */ /* access=0 */ /* align_mul=1073741824 */ /* align_offset=0 */
	/* succs: block_1 */
	block block_1:
}

----------------------------------------------------------

block0 {
2 = LOAD.i128 u0, u0[1]
3 = FADD.f32 2.neg, #0x0.neg
4 = FADD.f32 2[1].neg, #0x0.neg
5 = FADD.f32 2[2].neg, #0x0.neg
6 = FADD.f32 2[3].neg, #0x0.neg
7 = MOV.i32 3
7[1] = MOV.i32 4
7[2] = MOV.i32 5
7[3] = MOV.i32 6
 = STORE.i128 7, u0, u0[1]
}

----------------------------------------------------------

block0 {
br0 = LOAD.i128 u0, u0[1]
br0 = FADD.f32 br0.neg, #0x0.neg
br1 = FADD.f32 br1.neg, #0x0.neg
br2 = FADD.f32 br2.neg, #0x0.neg
br3 = FADD.f32 br3.neg, #0x0.neg
 = STORE.i128 br0, u0, u0[1]
}

----------------------------------------------------------

80 00 00 38 88 80 60 08    LOAD.i128.unk39.slot0.wait0 @r0:r1:r2:r3, u0, offset:0
00 c0 00 00 50 c0 a4 00    FADD.f32 r0, r0.neg, 0x0.neg
01 c0 00 00 50 c1 a4 00    FADD.f32 r1, r1.neg, 0x0.neg
02 c0 00 00 50 c2 a4 00    FADD.f32 r2, r2.neg, 0x0.neg
03 c0 00 00 50 c3 a4 00    FADD.f32 r3, r3.neg, 0x0.neg
80 00 00 38 08 40 61 78    STORE.i128.slot0.return @r0:r1:r2:r3, u0, offset:0